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Espressif Systems /ESP32-S3 /UART0 /MEM_CONF

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Interpret as MEM_CONF

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0RX_SIZE 0TX_SIZE 0RX_FLOW_THRHD0RX_TOUT_THRHD0 (MEM_FORCE_PD)MEM_FORCE_PD 0 (MEM_FORCE_PU)MEM_FORCE_PU

Description

UART threshold and allocation configuration

Fields

RX_SIZE

This register is used to configure the amount of mem allocated for receive-FIFO. The default number is 128 bytes.
TX_SIZE

This register is used to configure the amount of mem allocated for transmit-FIFO. The default number is 128 bytes.
RX_FLOW_THRHD

This register is used to configure the maximum amount of data that can be received when hardware flow control works.
RX_TOUT_THRHD

This register is used to configure the threshold time that receiver takes to receive one byte. The rxfifo_tout_int interrupt will be trigger when the receiver takes more time to receive one byte with rx_tout_en set to 1.
MEM_FORCE_PD

Set this bit to force power down UART memory.
MEM_FORCE_PU

Set this bit to force power up UART memory.

Links

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Register License

Copyright 2024 Espressif Systems (Shanghai) PTE LTD

Licensed under the Apache License, Version 2.0 (the “License”); you may not use this file except in compliance with the License. You may obtain a copy of the License at

http://www.apache.org/licenses/LICENSE-2.0

Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an “AS IS” BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and limitations under the License.

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data